The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 14, 2012
Filed:
Aug. 21, 2009
Applicant:
Hiroshi Yoshino, Tokyo, JP;
Inventor:
Hiroshi Yoshino, Tokyo, JP;
Assignee:
Elpida Memory, Inc., Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G03F 7/26 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method of manufacturing a semiconductor device includes the following processes. A first resist layer covering an etching object is patterned to form a first resist pattern. Then, a filling layer that covers the first resist pattern and has a flat upper surface is formed. Then, a second resist layer covering the flat upper surface is patterned to from a second resist pattern.
Yoshino, Hiroshi. (2012). Method of manufacturing semiconductor device (U.S. Patent No. 8241838). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8241838
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile