The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2012

Filed:

Aug. 14, 2009
Applicants:

John Chen, Palo Alto, CA (US);

IL Kwan Lee, San Ramon, CA (US);

Hong Chang, Cupertino, CA (US);

Wenjun LI, Shanghai, CN;

Anup Bhalla, Santa Clara, CA (US);

Hamza Yilmaz, Saratoga, CA (US);

Inventors:

John Chen, Palo Alto, CA (US);

Il Kwan Lee, San Ramon, CA (US);

Hong Chang, Cupertino, CA (US);

Wenjun Li, Shanghai, CN;

Anup Bhalla, Santa Clara, CA (US);

Hamza Yilmaz, Saratoga, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating a semiconductor device includes forming a plurality of trenches, including applying a first mask, forming a first polysilicon region in at least some of the plurality of trenches, forming a inter-polysilicon dielectric region and a termination protection region, including applying a second mask, forming a second polysilicon region in the at least some of the plurality of trenches, forming a first electrical contact to the first polysilicon region and forming a second electrical contact to the second polysilicon region, including applying a third mask, disposing a metal layer, and forming a source metal region and a gate metal region, including applying a fourth mask.


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