The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 31, 2012

Filed:

May. 14, 2010
Applicants:

Wataru Itou, Tokyo, JP;

Takashi Nakayama, Tokyo, JP;

Shigeru Umeno, Tokyo, JP;

Hiroaki Taguchi, Tokyo, JP;

Yasuo Koike, Tokyo, JP;

Inventors:

Wataru Itou, Tokyo, JP;

Takashi Nakayama, Tokyo, JP;

Shigeru Umeno, Tokyo, JP;

Hiroaki Taguchi, Tokyo, JP;

Yasuo Koike, Tokyo, JP;

Assignee:

Sumco Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
C01B 33/02 (2006.01); H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

It is possible to provide a silicon wafer that as well as being free of COPs and dislocation clusters, has defects (grown-in defects including silicon oxides), which are not overt in an as-grown state, such as OSF nuclei and oxygen precipitate nuclei existing in the PV region, to be vanished or reduced, by adopting a method for producing a silicon wafer, the method comprising the steps of: growing a single crystal silicon ingot by the Czochralski method; cutting a silicon wafer out of the ingot; subjecting the wafer to an RTP at 1,250° C. or more for 10 seconds or more in an oxidizing atmosphere; and removing a grown-in defect region including silicon oxides in the vicinity of wafer surface layer after the RTP.


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