The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 24, 2012
Filed:
Dec. 14, 2009
Xia LI, San Diego, CA (US);
Wei Zhao, San Diego, CA (US);
Yu Cao, Tempe, AZ (US);
Shiqun Gu, San Diego, CA (US);
Seung H. Kang, San Diego, CA (US);
Ming-chu King, San Diego, CA (US);
Xia Li, San Diego, CA (US);
Wei Zhao, San Diego, CA (US);
Yu Cao, Tempe, AZ (US);
Shiqun Gu, San Diego, CA (US);
Seung H. Kang, San Diego, CA (US);
Ming-Chu King, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
A system of via structures disposed in a substrate. The system includes a first via structure that comprises an outer conductive layer, an inner insulating layer, and an inner conductive layer disposed in the substrate. The outer conductive layer separates the inner insulating layer and the substrate and the inner insulating layer separates the inner conductive layer and the outer conductive layer. A first signal of a first complementary pair passes through the inner conductive layer and a second signal of the first complementary pair passes through the outer conductive layer. In different embodiments, a method of forming a via structure in an electronic substrate is provided.