The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 17, 2012

Filed:

Sep. 10, 2010
Applicants:

Ashoke Ravi, Hillsboro, OR (US);

Paolo Madoglio, Beaverton, OR (US);

Marian Verhelst, Beaverton, OR (US);

Georgios Palaskas, Portland, OR (US);

Inventors:

Ashoke Ravi, Hillsboro, OR (US);

Paolo Madoglio, Beaverton, OR (US);

Marian Verhelst, Beaverton, OR (US);

Georgios Palaskas, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03C 3/02 (2006.01); H03K 7/06 (2006.01); H04B 1/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A device article and method for an open loop calibrated phase wrapping phase modulator. A tapped delay line may provide a coarse resolution for one or more phases of a signal. A phase multiplexer may receive one or more coarse phases from the tapped delay line and select a coarse phase to send to the digitally controlled delay line. A digitally controlled delay line may provide a fine resolution to the coarse phase from the phase multiplexer.


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