The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 2012

Filed:

Jan. 27, 2011
Applicants:

Yiran Chen, Eden Prairie, MN (US);

Hai LI, Eden Prairie, MN (US);

Wenzhong Zhu, Apple Valley, MN (US);

Xiaobin Wang, Chanhasssen, MN (US);

Henry Huang, Apple Valley, MN (US);

Hongyue Liu, Maple Grove, MN (US);

Inventors:

Yiran Chen, Eden Prairie, MN (US);

Hai Li, Eden Prairie, MN (US);

Wenzhong Zhu, Apple Valley, MN (US);

Xiaobin Wang, Chanhasssen, MN (US);

Henry Huang, Apple Valley, MN (US);

Hongyue Liu, Maple Grove, MN (US);

Assignee:

Seagate Technology LLC, Scotts Valley, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 5/14 (2006.01); G11C 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

Resistive memory calibration for self-reference read methods are described. One method of self-reference reading a resistive memory unit includes setting a plurality of resistive memory units to a first resistive data state. The resistive memory units forms a memory array. Reading a sensed resistive data state for each resistive memory unit by applying a first read current and a second read current through each resistive memory unit and then comparing voltages formed by the first read current and the second read current to determine the sensed resistive data state for each resistive memory unit. Then the method includes adjusting the first or the second read current, read voltages, or storage device capacitance for each resistive memory unit where the sensed resistive data state was not the same as the first resistive data state until the sensed resistive data state is the same as the first resistive data state.


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