The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 2012

Filed:

Apr. 02, 2008
Applicants:

Po-lin Chen, Hsinchu, TW;

Chun-nan Lin, Hsinchu, TW;

Shu-feng Wu, Hsinchu, TW;

Wen-ching Tsai, Hsinchu, TW;

Inventors:

Po-Lin Chen, Hsinchu, TW;

Chun-Nan Lin, Hsinchu, TW;

Shu-Feng Wu, Hsinchu, TW;

Wen-Ching Tsai, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A pixel structure disposed on a substrate including a thin film transistor (TFT), a bottom capacitor electrode, a dielectric layer, an upper capacitor electrode, a passivation layer, and a pixel electrode is provided. The TFT having a source/drain and the bottom capacitor electrode are disposed on the substrate. The dielectric layer is disposed on the bottom capacitor electrode. The upper capacitor electrode has a semiconductor layer, a barrier layer, and a metal layer. The semiconductor layer is disposed on the dielectric layer above the bottom capacitor electrode. The barrier layer is disposed on the semiconductor layer. The metal layer whose material includes copper, a copper alloy, or a combination thereof is disposed on the barrier layer. The passivation layer covers the TFT and the upper capacitor electrode and has a first opening exposing the source/drain. The pixel electrode is electrically connected to the TFT through the first opening.


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