The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 2012

Filed:

Jul. 28, 2009
Applicants:

Theodore W. Houston, Richardson, TX (US);

Shyh-horng Yang, Plano, TX (US);

Kayvan Sadra, Addison, TX (US);

Inventors:

Theodore W. Houston, Richardson, TX (US);

Shyh-Horng Yang, Plano, TX (US);

Kayvan Sadra, Addison, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of controlling gate induced drain leakage current of a transistor is disclosed. The method includes forming a dielectric region () on a surface of a substrate having a first concentration of a first conductivity type (P-well). A gate region () having a length and a width is formed on the dielectric region. Source () and drain () regions having a second conductivity type (N+) are formed in the substrate on opposite sides of the gate region. A first impurity region () having the first conductivity type (P+) is formed adjacent the source. The first impurity region has a second concentration greater than the first concentration.


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