The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 26, 2012

Filed:

Jun. 21, 2010
Applicants:

James P. Flynn, Beaverton, OR (US);

Junqi Hua, Portland, OR (US);

Robert B. Lefferts, Portland, OR (US);

Richard H. Steeves, Portland, OR (US);

John T. Stonick, Portland, OR (US);

Daniel K. Weinlader, Allentown, PA (US);

Jianping Wen, Beaverton, OR (US);

Skye Wolfer, Hillsboro, OR (US);

David A. Yokoyama-martin, Portland, OR (US);

Inventors:

James P. Flynn, Beaverton, OR (US);

Junqi Hua, Portland, OR (US);

Robert B. Lefferts, Portland, OR (US);

Richard H. Steeves, Portland, OR (US);

John T. Stonick, Portland, OR (US);

Daniel K. Weinlader, Allentown, PA (US);

Jianping Wen, Beaverton, OR (US);

Skye Wolfer, Hillsboro, OR (US);

David A. Yokoyama-Martin, Portland, OR (US);

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

Systems and techniques for adapting and/or optimizing an equalizer of a receiver are described. The equalizer's behavior can be adjusted by modifying one or more equalization parameters. At the beginning of the adaptation and/or optimization process, the system can determine robust initial values for the one or more equalization parameters. The system can then adapt and/or optimize the equalizer by iteratively adjusting the one or more equalization parameters. Specifically, in each iteration, the system can use the receiver's clock and data recovery (CDR) circuitry to determine the number of early and late data transitions associated with one or more data patterns. Next, the system can adjust the one or more equalization parameters so that, for each data pattern in the one or more data patterns, the ratio between the number of early data transitions and the number of late data transitions is substantially equal to a desired value.


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