The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 19, 2012
Filed:
Feb. 12, 2010
Hsiang-lan Lung, Dobbs Ferry, NY (US);
Yen-hao Shih, Elmsford, NY (US);
Erh-kun Lai, Elmsford, NY (US);
Ming Hsiu Lee, Hsinchu, TW;
Hang-ting Lue, Hsinchu, TW;
Hsiang-Lan Lung, Dobbs Ferry, NY (US);
Yen-Hao Shih, Elmsford, NY (US);
Erh-Kun Lai, Elmsford, NY (US);
Ming Hsiu Lee, Hsinchu, TW;
Hang-Ting Lue, Hsinchu, TW;
Macronix International Co., Ltd., Hsinchu, TW;
Abstract
A 3D memory device includes an array of semiconductor body pillars and bit line pillars, dielectric charge trapping structures, and a plurality of levels of word line structures arranged orthogonally to the array of semiconductor body pillars and bit line pillars. The semiconductor body pillars have corresponding bit line pillars on opposing first and second sides, providing source and drain terminals. The semiconductor body pillars have first and second channel surfaces on opposing third and fourth sides. Dielectric charge trapping structures overlie the first and second channel surfaces, providing data storage sites on two sides of each semiconductor body pillar in each level of the 3D array. The device can be operated as a 3D AND-decoded flash memory.