The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 12, 2012
Filed:
Jun. 03, 2010
Hsin-ming Chen, Hsinchu, TW;
Shih-chen Wang, Taipei, TW;
Wen-hao Ching, Hsinchu County, TW;
Yen-hsin Lai, Taipei, TW;
Ching-sung Yang, Hsinchu, TW;
Hsin-Ming Chen, Hsinchu, TW;
Shih-Chen Wang, Taipei, TW;
Wen-Hao Ching, Hsinchu County, TW;
Yen-Hsin Lai, Taipei, TW;
Ching-Sung Yang, Hsinchu, TW;
eMemory Technology Inc., Hsinchu, TW;
Abstract
A single-polysilicon layer non-volatile memory having a floating gate transistor, a program gate and a control gate is provided. The floating gate transistor has a floating gate and a tunneling dielectric layer. The floating gate is disposed on a substrate. The tunneling dielectric layer is disposed between the floating gate and the substrate. The program gate, the control gate and the erase gate are respectively disposed in the substrate under the floating gate separated by the tunneling dielectric layer. Therefore, during a program operation and an erase operation, charges are injected in and expelled out through different regions of the tunneling dielectric layer, so as to increase reliability of the non-volatile memory.