The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2012

Filed:

Dec. 15, 2006
Applicants:

Inderjit Singh, Saratoga, CA (US);

Ray Chen, Fremont, CA (US);

Orion K. Starr, San Jose, CA (US);

Behdad Jafari, Saratoga, CA (US);

Inventors:

Inderjit Singh, Saratoga, CA (US);

Ray Chen, Fremont, CA (US);

Orion K. Starr, San Jose, CA (US);

Behdad Jafari, Saratoga, CA (US);

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit/substrate interconnect apparatus and method are provided. Included is an integrated circuit including a plurality of bond pads, and a substrate including a plurality of landing pads and a mask. Such mask is spaced from the landing pads for defining areas therebetween. Further provided is a plurality of interconnects connected between the bond pads of the integrated circuit and the landing pads of the substrate. The interconnects include metal projections extending from the bond pads and a solder material for connecting the metal projections and the landing pads of the substrate.


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