The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 05, 2012
Filed:
Apr. 07, 2011
Oliver Haeberlen, Villach, AT;
Walter Rieger, Arnoldstein, AT;
Martin Vielemeyer, Villach, AT;
Lutz Goergens, Villach, AT;
Martin Poelzl, Ossiach, AT;
Milko Paolucci, Villach, AT;
Johannes Schoiswohl, San Jose, CA (US);
Joachim Krumrey, Goedersdorf, AT;
Sonja Krumrey, Legal Representative, Goedersdorf, AT;
Oliver Haeberlen, Villach, AT;
Walter Rieger, Arnoldstein, AT;
Martin Vielemeyer, Villach, AT;
Lutz Goergens, Villach, AT;
Martin Poelzl, Ossiach, AT;
Milko Paolucci, Villach, AT;
Johannes Schoiswohl, San Jose, CA (US);
Joachim Krumrey, Goedersdorf, AT;
Sonja Krumrey, legal representative, Goedersdorf, AT;
Infineon Technologies Austria AG, Villach, AT;
Abstract
One aspect is monolithic semiconductor switches and method for manufacturing. One embodiment provides a semiconductor die with a first n-type channel FET and a second n-type channel FET. A source of the first n-type channel FET and a drain of the second n-type channel FET are electrically coupled to at least one contact area at a first side of the semiconductor die, respectively. A drain of the first n-type channel FET, a gate of the first n-type channel FET, a source of the second n-type channel FET and the gate of the second n-type channel FET are electrically coupled to contact areas at a second side of the semiconductor die opposite to the first side, respectively. The contact areas of the drain of the first n-type channel FET, of the gate of the first n-type channel FET, of the source of the second n-type channel FET and of the gate of the second n-type channel FET are electrically separated from each other, respectively.