The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 29, 2012

Filed:

Feb. 08, 2008
Applicants:

David C. Lawson, Haymarket, VA (US);

Jason F. Ross, Fairfax, VA (US);

Inventors:

David C. Lawson, Haymarket, VA (US);

Jason F. Ross, Fairfax, VA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A single event upset (SEU) hardened memory cell to be utilized in static random access memories is disclosed. The SEU hardened memory cell includes a first transistor, a second transistor and a first resistor connected between a source of the first transistor and a drain of the second transistor. The SEU hardened memory cell also includes a third transistor, a fourth transistor and a second resistor connected between a source of the third transistor and a drain of the fourth transistor. The first resistor is also connected between a gate of the third transistor and the drain of the second transistor. The second resistor is also connected between a gate of the first transistor and the drain of the fourth transistor.


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