The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 29, 2012

Filed:

Jun. 26, 2006
Applicants:

Cheng-jye Liu, Hsinchu, TW;

Tai-liang Hsiung, Hsinchu, TW;

Inventors:

Cheng-Jye Liu, Hsinchu, TW;

Tai-Liang Hsiung, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/792 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory device including a substrate, a plurality of conductive layers, a composite dielectric layer and a plurality of gates are provided. Wherein, the conductive layers are disposed on the substrate. The composite dielectric layer is disposed on the substrate and covers the conductive layers. The composite dielectric layer includes a charge trapping layer. The gates are disposed on the composite dielectric layer and across the conductive layers. Wherein, the conductive layers can be used as local bit lines to reduce the resistance values and improve the performance of the memory device.


Find Patent Forward Citations

Liu, Cheng-Jye. (2012). Memory device and manufacturing method and operating method thereof (U.S. Patent No. 8188536). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8188536

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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