The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 15, 2012

Filed:

May. 07, 2008
Applicants:

David Ross Greenberg, White Plains, NY (US);

Jean-olivier Plouchart, New York, NY (US);

Alberto Valdes-garcia, White Plains, NY (US);

Inventors:

David Ross Greenberg, White Plains, NY (US);

Jean-Olivier Plouchart, New York, NY (US);

Alberto Valdes-Garcia, White Plains, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/41 (2006.01);
U.S. Cl.
CPC ...
Abstract

An electrical contact structure distributes current along a length thereof. The electrical contact structure includes a plurality of n metal rectangles on n levels of metal. The rectangle on one metal level is at least as wide in width and vertically covers in width the rectangle on the metal level immediately below. The rectangle on one metal level is shorter in length than and substantially aligned at a first end with the rectangle on the metal level immediately below. Rectangle first ends are substantially aligned. Features of an exemplary FET transistor of this invention are a source and drain terminal electrical contact structure, a multi-level metal ring connecting gate rectangles on both ends, and a wider-than-minimum gate-to-gate spacing. The invention is useful, for example, in an electromigration-compliant, high performance transistor.


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