The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 15, 2012
Filed:
Oct. 24, 2008
Patrice Simon, Toulouse, FR;
Pierre-louis Taberna, Escalquens, FR;
Thierry Lebey, Lacroix Falgarde, FR;
Jean Pascal Cambronne, Mervilla, FR;
Vincent Bley, Escalquens, FR;
Quoc Hung Luan, Toulouse, FR;
Jean Marie Tarascon, Mennecy, FR;
Patrice Simon, Toulouse, FR;
Pierre-Louis Taberna, Escalquens, FR;
Thierry Lebey, Lacroix Falgarde, FR;
Jean Pascal Cambronne, Mervilla, FR;
Vincent Bley, Escalquens, FR;
Quoc Hung Luan, Toulouse, FR;
Jean Marie Tarascon, Mennecy, FR;
Centre National de la Recherche Scientifique, Paris, FR;
Universite Paul Sabatier, Toulouse, FR;
Abstract
A method of fabricating an electrically conductive mechanical interconnection element () comprises: a first stage of electrochemically depositing a structure comprising a plurality of metal wires () of sub-micrometric diameter projecting from the likewise metallic surface of a substrate (); and a second stage of controlled partial dissolution of said wires to reduce their diameter. A method of making a mechanical and/or electrical interconnection, the method comprising the steps consisting in: fabricating two interconnection elements by a method as described above; and placing said interconnection elements face to face and pressing one against the other so as to cause the nanometric wires projecting from the surfaces of said elements to interpenetrate and tangle together. A three-dimensional electronic device comprising a stack of microelectronic chips mechanically and electrically connected to one another by such interconnection elements.