The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 08, 2012
Filed:
Sep. 23, 2009
Michael German, Modiin, IL;
Michel Ivgi, Yehud, IL;
Roee Elizov, Tel Aviv, IL;
Shlomo Davidson, Tel Aviv, IL;
Yair Khayat, Rosh Haayin, IL;
Michael German, Modiin, IL;
Michel Ivgi, Yehud, IL;
Roee Elizov, Tel Aviv, IL;
Shlomo Davidson, Tel Aviv, IL;
Yair Khayat, Rosh Haayin, IL;
Avaya Inc., Basking Ridge, NJ (US);
Abstract
A device including a PLD with at least one interface logic block connection for passing data between (i) a bus arranged for receiving data from an external processor and (ii) at least one I/O register connected with a JTAG interface of the PLD, wherein said interface logic block includes logic for translating data on the bus into a data format for the I/O register. A processor programmable PLD appliance comprising (a) a programmable PLD having a JTAG programming interface supporting real-time re-programming of the PLD while the PLD functions as programmed; and (b) an I/O register interfacing an I/O register and connected with the JTAG programming interface, wherein a PLD logic design implementation of the I/O register is externally accessible through an interface logic block of the PLD, and wherein the interface logic block includes a PLD path between (i) an external processor interface and (ii) the PLD-implemented I/O register.