The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 01, 2012
Filed:
May. 26, 2009
Wei Jun Chen, Taichung County, TW;
Chun Chi Chen, Taipei, TW;
Yun-zong Tian, Taichung County, TW;
Yi Feng Lee, Taipei County, TW;
Tsung-wei Lin, Taoyuan County, TW;
Wei Jun Chen, Taichung County, TW;
Chun Chi Chen, Taipei, TW;
Yun-Zong Tian, Taichung County, TW;
Yi Feng Lee, Taipei County, TW;
Tsung-Wei Lin, Taoyuan County, TW;
Inotera Memories, Inc., Taoyuan County, TW;
Abstract
A method for planning a semiconductor manufacturing process based on users' demands includes the steps of: establishing a genetic algorithm model and inputting data; establishing a fuzzy system and setting one output parameter representing percent difference of each cost function in neighbor generations; setting to have a modulation parameter corresponding to each input parameter for adjusting fuzzy sets of the output parameter; executing genetic algorithm actions; executing fuzzy inference actions; eliminating chromosomes that produce output parameter smaller than a defined lower limit, and the remaining chromosomes that produces the largest output parameter is defined as the optimum chromosome, wherein the genetic algorithm actions stops being executed upon the optimum chromosome; then determining whether or not a defined number of generations has been reached, if yes, executing the optimum chromosome of the last generation; if no, continuing executing the genetic algorithm actions, thereby finding the optimum semiconductor manufacturing process for users.