The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 17, 2012

Filed:

Sep. 26, 2008
Applicants:

Song Peng, San Jose, CA (US);

Ping-sheng Tseng, Saratoga, CA (US);

Quincy Shen, Saratoga, CA (US);

Inventors:

Song Peng, San Jose, CA (US);

Ping-sheng Tseng, Saratoga, CA (US);

Quincy Shen, Saratoga, CA (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/44 (2006.01); G06F 9/455 (2006.01);
U.S. Cl.
CPC ...
Abstract

Method and apparatus for implementing a task-based interface in a logic verification system is described. In some examples, a task server and a context memory are implemented in a hardware accelerator for a task. The task server is configured for communication with the logic design. A task stub configured for execution by a computer for the task is generated. Calls to the task are received from a test bench in the computer at the task stub. Remote procedure call (RPC) channels are established in response to the calls. Values of input arguments for the calls are transferred to the context memory through the RPC channels. Execution of threads of the task in the task server is triggered using the values of the input arguments in the context memory as parametric input.


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