The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 17, 2012
Filed:
Jul. 24, 2009
Laung-terng Wang, Sunnyvale, CA (US);
Nur A. Touba, Austin, TX (US);
Zhigang Jiang, Burlingame, CA (US);
Shianling Wu, Princeton Junction, NJ (US);
Ravi Apte, San Jose, CA (US);
Laung-Terng Wang, Sunnyvale, CA (US);
Nur A. Touba, Austin, TX (US);
Zhigang Jiang, Burlingame, CA (US);
Shianling Wu, Princeton Junction, NJ (US);
Ravi Apte, San Jose, CA (US);
STARDFX Technologies, Inc., Sunnyvale, CA (US);
Abstract
A method for performing robust scan synthesis for soft-error protection on a design for generating a robust scan design in a system. The system is modeled selectively at a register-transfer level (RTL) or a gate level; the design includes at least a sequential element or a scan cell for mapping to a robust scan cell of a select robust scan cell type. The method comprises performing a scan replacement and a scan stitching on the design database based on a given control information file for synthesizing the robust scan cell on the design database; and generating the synthesized robust scan design at a pre-determined RTL or a pre-determined gate level.