The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 17, 2012
Filed:
Apr. 11, 2008
Carolina Selva, Cologno Monzese, IT;
Cosimo Torelli, Cassina de Pecchi, IT;
Danilo Rimondi, Mozzo, IT;
Rita Zappa, Milan, IT;
Carolina Selva, Cologno Monzese, IT;
Cosimo Torelli, Cassina de Pecchi, IT;
Danilo Rimondi, Mozzo, IT;
Rita Zappa, Milan, IT;
STMicroelectronics S.R.L., Agrate Brianza (MI), IT;
Abstract
A method is for making an integrated circuit with built-in self-test. The method includes forming at least one nonvolatile read only memory (ROM) to store ROM code and forming a logic self-test circuit to verify a correct functioning of the at least one nonvolatile ROM. Moreover, the method includes defining, in the logic self-test circuit, a logic self-test core to process the ROM code and to generate a flag based upon a control signature and defining, in the logic self-test circuit, a nonvolatile storage block, coupled to the logic self-test core, to store the control signature. Furthermore, the method includes writing the ROM code to the at least one nonvolatile ROM and writing the control signature to the nonvolatile storage block, during a same fabrication step.