Method and apparatus for event-based simulation of a digital design having a power shut-off feature

Abstract

Method, apparatus, and computer readable medium for simulating a logic design having power domains are described. In some examples, a switchable power domain of the power domains is identified, the switchable power domain having primary inputs and having a power state switchable between a power-on state and a power-off state. The logic design is traversed to analyze driver and load logic of each of the primary inputs to the switchable power domain to identify any pure pass-through nets each of which has no driver and no load logic in the switchable power domain. An implicit logic device is inserted at each of the primary inputs not coupled to a pure pass-through net, each implicit logic device being in a corrupting state when the switchable power domain is in the power-off state and in a bypassing state when the switchable power domain is in the power-on state, the corrupting state corrupting the respective primary input with an undefined logic state, the bypassing state driving the respective primary input with a logic state of respective driver logic. An event-driven simulation of the logic design is performed.