The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 17, 2012

Filed:

Nov. 05, 2010
Applicants:

Baek Mann Kim, Gyeonggi-do, KR;

Seung Jin Yeom, Gyeonggi-do, KR;

Dong Ha Jung, Gyeonggi-do, KR;

Jeong Tae Kim, Gyeonggi-do, KR;

Inventors:

Baek Mann Kim, Gyeonggi-do, KR;

Seung Jin Yeom, Gyeonggi-do, KR;

Dong Ha Jung, Gyeonggi-do, KR;

Jeong Tae Kim, Gyeonggi-do, KR;

Assignee:

Hynix Semiconductor Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

A metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is formed on the semiconductor substrate having the lower metal line, and a metal line forming region exposing at least a portion of the lower metal line is defined in the insulation layer. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer and includes a WNlayer, a W—N—B ternary layer, and a Ti—N—B ternary layer. A wetting layer is formed on the diffusion barrier and is made of one of a Ti layer or a TiN layer. An upper metal line is formed on the wetting layer to fill the metal line forming region of the insulation layer.


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