The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 17, 2012
Filed:
Feb. 24, 2009
Hidetoshi Nishimura, Osaka, JP;
Hiroyuki Shimbo, Osaka, JP;
Tetsurou Toubou, Hyogo, JP;
Hiroki Taniguchi, Kyoto, JP;
Hisako Yoneda, Osaka, JP;
Hidetoshi Nishimura, Osaka, JP;
Hiroyuki Shimbo, Osaka, JP;
Tetsurou Toubou, Hyogo, JP;
Hiroki Taniguchi, Kyoto, JP;
Hisako Yoneda, Osaka, JP;
Panasonic Corporation, Osaka, JP;
Abstract
There is provided a layout structure of a semiconductor integrated circuit capable of preventing the thinning of a metal wiring line close to a cell boundary and wire breakage therein without involving increases in the amount of data for OPC correction and OPC process time. In a region interposed between a power supply line and a ground line each placed to extend in a first direction, first and second cells each having a transistor and an intra-cell line each for implementing a circuit function are placed to be adjacent to each other in the first direction. In a boundary portion between the first and second cells, a metal wiring line extending in a second direction orthogonal to the first direction is placed so as not to short-circuit the power supply line and the ground line.