The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 2012

Filed:

Jun. 20, 2008
Applicants:

Kazunori Hamada, Ebina, JP;

Hiroshi Kawasaki, Ebina, JP;

Tomoaki Ozaki, Ebina, JP;

Inventors:

Kazunori Hamada, Ebina, JP;

Hiroshi Kawasaki, Ebina, JP;

Tomoaki Ozaki, Ebina, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 3/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a printed circuit board is provided. The method includes preliminarily forming a plurality of test pattern layers for detecting the depth of an inner layer in a multilayer printed circuit board such that at least a part of a lower test pattern layer is not overlaid with any upper test pattern layer when viewed from a drill entrance side, and preliminarily forming a surface conductor layer; applying a voltage between the surface conductor layer and the test pattern layers; performing drilling toward one test pattern layer, and detecting a current produced when the drill comes into contact with the test pattern to measure the depth of the layer (D); performing drilling toward the other test pattern layer, and measuring the depth of the layer (D); and performing drilling up to just before the conductor-wiring layer based on a depth calculated from Dand D


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