The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2012

Filed:

Aug. 26, 2009
Applicants:

Dechao Guo, Wappingers Falls, NY (US);

Shu-jen Han, Wappingers Falls, NY (US);

Chung-hsun Lin, White Plains, NY (US);

Ning Su, Fishkill, NY (US);

Inventors:

Dechao Guo, Wappingers Falls, NY (US);

Shu-Jen Han, Wappingers Falls, NY (US);

Chung-Hsun Lin, White Plains, NY (US);

Ning Su, Fishkill, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01); H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device is disclosed that includes a silicon-on-insulator substrate including a buried insulator layer and an overlying semiconductor layer. Source extension and drain extension regions are formed in the semiconductor layer. A deep drain region and a deep source region are formed in the semiconductor layer. A first metal-semiconductor alloy contact layer is formed using tilted metal formation at an angle tilted towards the source extension region, such that the source extension region has a metal-semiconductor alloy contact that abuts the substrate from the source side, as a Schottky contact therebetween and the gate shields metal deposition from abutting the deep drain region. A second metal-semiconductor alloy contact is formed located on the first metal-semiconductor layer on each of the source extension region and drain extension region.


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