The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 13, 2012
Filed:
Sep. 14, 2009
Indrajit Manna, Singapore, SG;
Lo Keng Foo, Singapore, SG;
Tan Pee Ya, Singapore, SG;
Raymond Filippi, Singapore, SG;
Indrajit Manna, Singapore, SG;
Lo Keng Foo, Singapore, SG;
Tan Pee Ya, Singapore, SG;
Raymond Filippi, Singapore, SG;
GLOBALFOUNDRIES Singapore Pte, Ltd., Singapore, SG;
Agilent Technologies, Inc., Santa Clara, CA (US);
Abstract
An ESD protection circuit has a polysilicon bounded SCR connected between a signal input/output interface contact of the integrated circuit and a power supply connection of the integrated circuit and a biasing circuit. The biasing circuit is connected to the polysilicon bounded SCR to bias the polysilicon bounded SCR to turn on more rapidly during the ESD event. The biasing circuit is formed by at least one polysilicon bounded diode and a first resistance. Other embodiments of the biasing circuit include a resistor/capacitor biasing circuit and a second diode triggering biasing circuit.