The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 06, 2012

Filed:

Oct. 27, 2009
Applicants:

Pil-kyu Kang, Gyeonggi-do, KR;

Jung-ho Kim, Gyeonggi-do, KR;

Jong-wook Lee, Gyeonggi-do, KR;

Seung-woo Choi, Seoul, KR;

Dae-lok Bae, Seoul, KR;

Inventors:

Pil-kyu Kang, Gyeonggi-do, KR;

Jung-Ho Kim, Gyeonggi-do, KR;

Jong-Wook Lee, Gyeonggi-do, KR;

Seung-woo Choi, Seoul, KR;

Dae-Lok Bae, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01); H01L 23/053 (2006.01); H01L 23/12 (2006.01); H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 27/10 (2006.01); H01L 29/74 (2006.01);
U.S. Cl.
CPC ...
Abstract

Microelectronic packages are fabricated by stacking integrated circuits upon one another. Each integrated circuit includes a semiconductor layer having microelectronic devices and a wiring layer on the semiconductor layer having wiring that selectively interconnects the microelectronic devices. After stacking, a via is formed that extends through at least two of the integrated circuits that are stacked upon one another. Then, the via is filled with conductive material that selectively electrically contacts the wiring. Related microelectronic packages are also described.


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