The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 28, 2012
Filed:
Sep. 24, 2010
Pankaj Kumar, Bangalore, IN;
Pramod E Parameswaran, Bangalore, IN;
Makeshwar Kothandaraman, Whitehall, PA (US);
Vani Deshpande, Bangalore, IN;
John Kriz, Palmerton, PA (US);
Pankaj Kumar, Bangalore, IN;
Pramod E Parameswaran, Bangalore, IN;
Makeshwar Kothandaraman, Whitehall, PA (US);
Vani Deshpande, Bangalore, IN;
John Kriz, Palmerton, PA (US);
LSI Corporation, Milpitas, CA (US);
Abstract
A method includes controllably generating a first bias voltage from a supply voltage to be within an upper tolerable limit of an operating voltage of one or more constituent active circuit element(s) of an Input/Output (IO) core device of an integrated circuit (IC) to be interfaced with an IO pad, and controllably generating a second bias voltage from an external voltage supplied through the IO pad to be within the upper tolerable limit of the operating voltage of the one or more constituent active circuit element(s) of the IO core device to be interfaced with the IO pad. The method also includes controllably utilizing a control signal generated by the IO core to derive an output bias voltage from the first bias voltage during a driver mode of operation or the second bias voltage during a failsafe mode of operation and a tolerant mode of operation.