The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 28, 2012
Filed:
Apr. 09, 2009
Olubunmi O. Adetutu, Austin, TX (US);
Mariam G. Sadaka, Austin, TX (US);
Ted R. White, Austin, TX (US);
Bich-yen Nguyen, Austin, TX (US);
Olubunmi O. Adetutu, Austin, TX (US);
Mariam G. Sadaka, Austin, TX (US);
Ted R. White, Austin, TX (US);
Bich-Yen Nguyen, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A semiconductor process and apparatus includes forming first and second metal gate electrodes () over a hybrid substrate () by forming the first gate electrode () over a first high-k gate dielectric () and forming the second gate electrode () over at least a second high-k gate dielectric () different from the first gate dielectric (). By forming the first gate electrode () over a first SOI substrate () formed by depositing (100) silicon and forming the second gate electrode () over an epitaxially grown (110) SiGe substrate (), a high performance CMOS device is obtained which includes high-k metal PMOS gate electrodes () having improved hole mobility.