The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 2012

Filed:

Oct. 13, 2009
Applicants:

Shyam Chandra, Portland, OR (US);

OM Agrawal, Los Altos, CA (US);

Ludmil Nikolov, Chippenham, GB;

Harald Weller, Romsey, GB;

Douglas Morse, Bath, GB;

Inventors:

Shyam Chandra, Portland, OR (US);

Om Agrawal, Los Altos, CA (US);

Ludmil Nikolov, Chippenham, GB;

Harald Weller, Romsey, GB;

Douglas Morse, Bath, GB;

Assignee:

Lattice Semiconductor Corporation, Hillsboro, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/04 (2006.01); G06F 5/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment, a clock distribution chip includes a clock input adapted to receive an input clock signal, clock dividers each adapted to receive a clock signal based on the first input clock signal and to generate a divided clock signal, and programmable clock outputs adapted to provide output clock signals. The clock outputs are configurable to support a number of signaling standards. A programmable switch fabric is coupled between the clock dividers and the clock outputs and is configurable to provide the divided clock signals to the clock outputs.


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