The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8117568 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 14, 2012

Filed:

Sep. 25, 2008
Applicants:

Hua Xiang, Ossining, NY (US);

Laertis Economikos, Wappingers Falls, NY (US);

Mohammed F. Fayaz, Pleasantville, NY (US);

Stephen E. Greco, Lagrangeville, NY (US);

Patricia A. O'neil, Newburgh, NY (US);

Ruchir Puri, Baldwin Place, NY (US);

Inventors:

Hua Xiang, Ossining, NY (US);

Laertis Economikos, Wappingers Falls, NY (US);

Mohammed F. Fayaz, Pleasantville, NY (US);

Stephen E. Greco, Lagrangeville, NY (US);

Patricia A. O'Neil, Newburgh, NY (US);

Ruchir Puri, Baldwin Place, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 9/455 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods, apparatus and computer program products provide a fast and accurate model for simulating the effects of chemical mechanical polishing (CMP) steps during fabrication of an integrated circuit by generating a design of an integrated circuit; while generating the design of the integrated circuit, using a simplified model to predict at least one physical characteristic of the integrated circuit which results from a CMP processing step to be used during manufacture of the integrated circuit, wherein the simplified model is derived from simulations performed prior to the design generation activities using a comprehensive simulation program used to model the physical characteristic; predicting performance of the integrated circuit using the predicted physical characteristic; and adjusting the design of the integrated circuit in dependence on the performance prediction.


Find Patent Forward Citations

Xiang, Hua. (2012). Apparatus, method and computer program product for fast simulation of manufacturing effects during integrated circuit design (U.S. Patent No. 8117568). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8117568

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