The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2012

Filed:

Jan. 21, 2010
Applicant:

Kiyoshi Nakai, Tokyo, JP;

Inventor:

Kiyoshi Nakai, Tokyo, JP;

Assignee:

Elpida Memory, Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
Abstract

To provide a plurality of write amplifiers that perform a data write operation upon memory cells and a write control circuit that controls a timing of a data write operation performed by the write amplifiers. When a data write operation using another write amplifier is requested while a data write operation using a predetermined write amplifier is performed, the write control circuit suspends the data write operation using the predetermined write amplifier. The suspended data write operation is performed again simultaneously with the data write operation using the other write amplifier. Accordingly, random column access like that of a DRAM can be realized by simple control.


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