The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2012

Filed:

May. 06, 2008
Applicants:

Mu-seob Shin, Chungcheongnam-do, KR;

Min-young Son, Chungcheongnam-do, KR;

Tae-sung Yoon, Chungcheongnam-do, KR;

Young-hee Song, Gyeonggi-do, KR;

Byung-seo Kim, Gyeonggi-do, KR;

Inventors:

Mu-Seob Shin, Chungcheongnam-do, KR;

Min-Young Son, Chungcheongnam-do, KR;

Tae-Sung Yoon, Chungcheongnam-do, KR;

Young-Hee Song, Gyeonggi-do, KR;

Byung-Seo Kim, Gyeonggi-do, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/11 (2006.01); H05K 3/34 (2006.01); H01L 23/02 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided are a semiconductor package, a method of forming the semiconductor package, and a printed circuit board (PCB). The semiconductor package includes: a PCB including at least two parts divided by an isolation region; a semiconductor chip mounted on the PCB; and a molding layer disposed in the isolation region. The method includes: preparing a PCB, the PCB including a plurality of chip regions and a scribe region; forming isolation regions dividing each of the chip regions into two parts, the isolation regions including inner isolation regions and outer isolation regions, the inner isolation regions being provided in the chip regions, the outer isolation regions being provided at both ends of the inner isolation regions so as to extend toward the scribe region; mounting semiconductor chips on the chip regions; and cutting the PCB along the scribe region to divide the chip regions into at least two parts.


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