The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 14, 2012
Filed:
Feb. 22, 2010
Applicants:
Warren M. Farnworth, Nampa, ID (US);
Jerry M. Brooks, Caldwell, ID (US);
Inventors:
Warren M. Farnworth, Nampa, ID (US);
Jerry M. Brooks, Caldwell, ID (US);
Assignee:
Round Rock Research, LLC, Mt. Kisco, NY (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 31/075 (2006.01); H01L 31/105 (2006.01); H01L 31/117 (2006.01);
U.S. Cl.
CPC ...
Abstract
A technique for making an integrated circuit package. Specifically, a stacked memory device is provided with minimal interconnects. Memory die are stacked on top of each other and electrically coupled to a substrate. Thru vias are provided in the substrate and/or memory die to facilitate the electrical connects without necessitating a complex interconnect technology between each of the interfaces. Wire bonds are used to complete the circuit package.