The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 14, 2012
Filed:
Jun. 25, 2008
Ichiro Mizushima, Yokohama, JP;
Yoshio Ozawa, Yokohama, JP;
Takashi Nakao, Yokohama, JP;
Akihito Yamamoto, Naka-gun, JP;
Takashi Suzuki, Yokohama, JP;
Masahiro Kiyotoshi, Sagamihara, JP;
Minako Inukai, Yokohama, JP;
Kaori Umezawa, Kamakura, JP;
Hiroaki Yamada, Yokkaichi, JP;
Ichiro Mizushima, Yokohama, JP;
Yoshio Ozawa, Yokohama, JP;
Takashi Nakao, Yokohama, JP;
Akihito Yamamoto, Naka-gun, JP;
Takashi Suzuki, Yokohama, JP;
Masahiro Kiyotoshi, Sagamihara, JP;
Minako Inukai, Yokohama, JP;
Kaori Umezawa, Kamakura, JP;
Hiroaki Yamada, Yokkaichi, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A method of manufacturing a semiconductor device includes removing a part of a semiconductor substrate to form a protruding portion and a recess portion in a surface area of the semiconductor substrate, forming a first epitaxial semiconductor layer in the recess portion, forming a second epitaxial semiconductor layer on the protruding portion and the first epitaxial semiconductor layer, removing a first part of the second epitaxial semiconductor layer with a second part of the second epitaxial semiconductor layer left to expose a part of the first epitaxial semiconductor layer, and etching the first epitaxial semiconductor layer from the exposed part of the first epitaxial semiconductor layer to form a cavity under the second part of the second epitaxial semiconductor layer.