The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2012

Filed:

Sep. 25, 2008
Applicants:

Harry Chandra, Mountain House, CA (US);

Flynn Carson, Redwood City, CA (US);

Inventors:

Harry Chandra, Mountain House, CA (US);

Flynn Carson, Redwood City, CA (US);

Assignee:

STATS ChipPAC, Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/552 (2006.01); H01L 23/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device is made by mounting a plurality of semiconductor die to a substrate, depositing an encapsulant over the substrate and semiconductor die, forming a shielding layer over the semiconductor die, creating a channel in a peripheral region around the semiconductor die through the shielding layer, encapsulant and substrate at least to a ground plane within the substrate, depositing a conductive material in the channel, and removing a portion of the conductive material in the channel to create conductive vias in the channel which provide electrical connection between the shielding layer and ground plane. An interconnect structure is formed on the substrate and are electrically connected to the ground plane. Solder bumps are formed on a backside of the substrate opposite the semiconductor die. The shielding layer is connected to a ground point through the conductive via, ground plane, interconnect structure, and solder bumps of the substrate.


Find Patent Forward Citations

Chandra, Harry. (2012). Method of electrically connecting a shielding layer to ground through a conductive via disposed in peripheral region around semiconductor die (U.S. Patent No. 8110441). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8110441

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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