The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8106515 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 31, 2012

Filed:

Jun. 08, 2010
Applicants:

Jeffery B. Maxson, Hopewell Junction, NY (US);

Aurelia A. Suwarno-handayana, Hopewell Junction, NY (US);

Shamas M. Ummer, Hopewell Junction, NY (US);

Kenneth J. Giewont, Hopewell Junction, NY (US);

Scott Richard Stiffler, Hopewell Junction, NY (US);

Inventors:

Jeffery B. Maxson, Hopewell Junction, NY (US);

Aurelia A. Suwarno-Handayana, Hopewell Junction, NY (US);

Shamas M. Ummer, Hopewell Junction, NY (US);

Kenneth J. Giewont, Hopewell Junction, NY (US);

Scott Richard Stiffler, Hopewell Junction, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

An embodiment of the invention provides a method of creating local metallization in a semiconductor structure, and the use of local metallization so created in semiconductor structures. In one respect, the method includes forming an insulating layer on top of a semiconductor substrate; creating a plurality of voids inside the insulating layer, with the plurality of voids spanning across a predefined area and being substantially confined within a range of depth below a top surface of the insulating layer; creating at least one via hole in the insulating layer, with the via hole passing through the predefined area; and filling the via hole, and the plurality of voids inside the insulating layer through at least the via hole, with a conductive material to form a local metallization. A semiconductor structure having the local metallization is also provided.


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