The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 24, 2012
Filed:
Mar. 31, 2008
Lihu Rappoport, Haifa, IL;
Bob Valentine, Qiryat Tivon, IL;
Stephan Jourdan, Portland, OR (US);
Yoav Almog, Barcelona, ES;
Franck Sala, Haifa, IL;
Amir Leibovitz, Biniamina, IL;
Ido Ouziel, Haifa, IL;
Ron Gabor, Raanana, IL;
Lihu Rappoport, Haifa, IL;
Bob Valentine, Qiryat Tivon, IL;
Stephan Jourdan, Portland, OR (US);
Yoav Almog, Barcelona, ES;
Franck Sala, Haifa, IL;
Amir Leibovitz, Biniamina, IL;
Ido Ouziel, Haifa, IL;
Ron Gabor, Raanana, IL;
Intel Corporation, Santa Clara, CA (US);
Abstract
Methods and apparatus for using micro-op caches in processors are disclosed. A tag match for an instruction pointer retrieves a set of micro-op cache line access tuples having matching tags. The set is stored in a match queue. Line access tuples from the match queue are used to access cache lines in a micro-op cache data array to supply a micro-op queue. On a micro-op cache miss, a macroinstruction translation engine (MITE) decodes macroinstructions to supply the micro-op queue. Instruction pointers are stored in a miss queue for fetching macroinstructions from the MITE. The MITE may be disabled to conserve power when the miss queue is empty-likewise for the micro-op cache data array when the match queue is empty. Synchronization flags in the last micro-op from the micro-op cache on a subsequent micro-op cache miss indicate where micro-ops from the MITE merge with micro-ops from the micro-op cache.