The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 17, 2012

Filed:

Jul. 31, 2008
Applicants:

Marko P Chew, Palo Alto, CA (US);

Yue Yang, Cupertino, CA (US);

Juan Andres Torres Robles, Wilsonville, OR (US);

Inventors:

Marko P Chew, Palo Alto, CA (US);

Yue Yang, Cupertino, CA (US);

Juan Andres Torres Robles, Wilsonville, OR (US);

Assignee:

Mentor Graphics Corporation, Wilsonville, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Shapes neighboring a potential manufacturing fault within a microdevice design layout are identified. Models are employed to determine the affect of the shapes upon the potential manufacturing fault. Possible adjustments to the shapes are modeled. The possible adjustments facilitating resolution of the potential manufacturing fault.


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Chew, Marko. (2012). Model based microdevice design layout correction (U.S. Patent No. 8099685). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8099685

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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