The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 10, 2012
Filed:
Oct. 09, 2009
Muhammad M. Khellah, Tigard, OR (US);
Bibiche M. Geuskens, Beaverton, OR (US);
Arijit Raychowdhury, Hillsboro, OR (US);
Muhammad M. Khellah, Tigard, OR (US);
Bibiche M. Geuskens, Beaverton, OR (US);
Arijit Raychowdhury, Hillsboro, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method and system to lower the minimum operating voltage of a memory array during read and/or write operations of the memory array. In one embodiment of the invention, the voltage of the read and/or write word line of the memory array is boosted or increased during read and/or write operations of the memory array. By doing so, the NMOS devices in the memory array are strengthened and the contention between the NMOS and PMOS devices are reduced during read and/or write operations of the memory array. This helps to lower or reduce the required VCCof the memory array during read and/or write operations of the memory array.