The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2012

Filed:

Oct. 01, 2008
Applicants:

Kao-way Tu, Taipei County, TW;

Cheng-hui Tung, Taipei County, TW;

Hsiao-wei Tsai, Taichung County, TW;

Inventors:

Kao-Way Tu, Taipei County, TW;

Cheng-Hui Tung, Taipei County, TW;

Hsiao-Wei Tsai, Taichung County, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A fabrication method of a trench metal oxide-semiconductor (MOS) transistor is provided. After the gate trenches are formed in the epitaxial layer, impurities of a first conductive type are implanted into the epitaxial layer by using a blanket implantation process. A polysilicon pattern filling the gate trenches and covering a predetermined range of epitaxial layer surrounding the gate trenches is formed on the epitaxial layer. Impurities of a second conductive type are implanted through the polysilicon pattern into the epitaxial layer to form a well. Impurities of the first conductive type are implanted to form a plurality of first doping regions. A portion of the polysilicon layer above the upper surface of the epitaxial layer is removed by etching to form a plurality of polysilicon gates. Impurities in the first doping regions are driven in to form a plurality of source regions adjacent to the gate trenches.


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