The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2011

Filed:

Apr. 10, 2009
Applicants:

Ken Shiring, Campbell, CA (US);

Peter A. Beerel, Encino, CA (US);

Andrew Lines, Malibu, CA (US);

Arash Saifhashemi, Los Angeles, CA (US);

Inventors:

Ken Shiring, Campbell, CA (US);

Peter A. Beerel, Encino, CA (US);

Andrew Lines, Malibu, CA (US);

Arash Saifhashemi, Los Angeles, CA (US);

Assignees:

University of Southern California, Los Angeles, CA (US);

Fulcrum Microsystems, Inc., Calabasas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Techniques are described for converting netlists for synchronous circuits such as combinational modules, flip flops (or latches), and clock gating modules, to netlist of asynchronous modules. Processes including algorithms are described that bundle multiple modules in an enable domain, so that they are activated only if the incoming enable token to the enable domain has the UPDATE value. The modules can be clustered inside an enable domain, so that each cluster has a separate controller. The objective function of bundling and clustering can minimize power consumption with respect to a given cycle time. Exemplary embodiments can include a gated multilevel domino template.


Find Patent Forward Citations

Loading…