The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 20, 2011
Filed:
Mar. 20, 2009
Applicant:
Daisuke Fukuda, Kawasaki, JP;
Inventor:
Daisuke Fukuda, Kawasaki, JP;
Assignee:
Fujitsu Limited, Kawasaki, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 11/22 (2006.01); G06F 19/00 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method for evaluating a process of manufacturing a semiconductor integrated circuit including a deposition step and a polishing step after the deposition step, the method includes: dividing the semiconductor integrated circuit into a plurality of areas; determining a deposition height after the deposition step for each of the areas; and determining a risk value for each of the areas on the basis of a difference in the deposition height between each of the areas and its adjacent areas.
Quick Actions:
Fukuda, Daisuke. (2011). Semiconductor integrated circuit manufacturing process evaluation method (U.S. Patent No. 8082536). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8082536
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile