The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 20, 2011
Filed:
Feb. 13, 2009
Chee T. Chua, Fremont, CA (US);
Kameswara K. Rao, San Jose, CA (US);
Vithal R. Rao, San Jose, CA (US);
Jawji Chen, Fremont, CA (US);
Da-guang Yu, Fremont, CA (US);
J. Eric Ruetz, Soquel, CA (US);
Stephen Fung, Cupertino, CA (US);
Chee T. Chua, Fremont, CA (US);
Kameswara K. Rao, San Jose, CA (US);
Vithal R. Rao, San Jose, CA (US);
Jawji Chen, Fremont, CA (US);
Da-Guang Yu, Fremont, CA (US);
J. Eric Ruetz, Soquel, CA (US);
Stephen Fung, Cupertino, CA (US);
MoSys, Inc., Santa Clara, CA (US);
Abstract
A memory circuit for holding a single binary value. A first bit cell holds one of a logical high value and a logical low value, and a second bit cell also holds one of a logical high value and a logical low value. Circuitry is provided for placing a logical high value in the first bit cell when the binary value in the memory circuit is to be a logical high value, and circuitry is provided for placing a logical high value in the second bit cell when the binary value in the memory circuit is to be a logical low value. In this manner, a logical high value exists within the memory circuit, whether the single binary value within the memory circuit is a logical high value or a logical low value. The difference between the two values of the binary value is which of the two bit cells holds the logical high value. Thus, this memory circuit can be sensed without the use of a sense amplifier.