The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 20, 2011
Filed:
Dec. 17, 2009
William Pierce Evans, Catonsville, MD (US);
William Pierce Evans, Catonsville, MD (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
A CMOS phase interpolation system comprises a capacitive integration unit coupled to a charge node and a plurality of selectively enabled current source units operably coupled to the charge node. The current source units each include: a charging segment; a discharging segment; and, a switching segment operable responsive to at least one periodic reference signal to selectively couple the charging and discharging segments to the charge node for alternatively charging and discharging the capacitive integration unit therethrough. The current source units are selectively enabled in predetermined combinations to uniquely define an output waveform at the charge node. An output conditioning unit coupled to the charge node generates a recovered periodic signal based on the output waveform. In certain applications, a duty cycle correction unit coupled to feed back from the output node adaptively biases a charging segment current of each enabled current source unit, responsive to the recovered periodic signal.