The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2011

Filed:

Jun. 26, 2008
Applicants:

Paul S. Andry, Yorktown Heights, NY (US);

John U. Knickerbocker, Monroe, NY (US);

Michelle L. Steen, Danbury, CT (US);

Cornelia K. Tsang, Mohegan Lake, NY (US);

Inventors:

Paul S. Andry, Yorktown Heights, NY (US);

John U. Knickerbocker, Monroe, NY (US);

Michelle L. Steen, Danbury, CT (US);

Cornelia K. Tsang, Mohegan Lake, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
Abstract

A process and structure for enabling the creation of reliable electrical through-via connections in a semiconductor substrate and a process for filling vias. Problems associated with under etch, over etch and flaring of deep Si RIE etched through-vias are mitigated, thereby vastly improving the integrity of the insulation and metallization layers used to convert the through-vias into highly conductive pathways across the Si wafer thickness. By using an insulating collar structure in the substrate in one case and by filling the via in accordance with the invention in another case, whole wafer yield of electrically conductive through vias is greatly enhanced.


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