The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2011

Filed:

May. 27, 2009
Applicants:

Joon Seok OH, Gyeonggi-do, KR;

Seung Jin Yeom, Gyeonggi-do, KR;

Baek Mann Kim, Gyeonggi-do, KR;

Dong Ha Jung, Gyeonggi-do, KR;

Nam Yeal Lee, Gyeonggi-do, KR;

Jae Hong Kim, Gyeonggi-do, KR;

Inventors:

Joon Seok Oh, Gyeonggi-do, KR;

Seung Jin Yeom, Gyeonggi-do, KR;

Baek Mann Kim, Gyeonggi-do, KR;

Dong Ha Jung, Gyeonggi-do, KR;

Nam Yeal Lee, Gyeonggi-do, KR;

Jae Hong Kim, Gyeonggi-do, KR;

Assignee:

Hynix Semiconductor Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/425 (2006.01); H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

A metal line having a MoSi/Mo diffusion barrier of a semiconductor device and corresponding methods of fabricating the same are presented. The metal line includes an insulation layer, a diffusion barrier, and a metal layer. The insulation layer is formed on a semiconductor substrate and has a metal line forming region. The diffusion barrier is formed on a surface of the metal line forming region of the insulation layer and has a stack structure composed of a MoSilayer and a Mo layer. The metal layer is formed on the diffusion barrier which fills in the metal line forming region of the insulation layer.


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