The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2011

Filed:

Sep. 15, 2009
Applicants:

Manolito Galera, Singapore, SG;

Leocadio Alabin, Singapore, SG;

IN Suk Kim, Singapore, SG;

Inventors:

Manolito Galera, Singapore, SG;

Leocadio Alabin, Singapore, SG;

In Suk Kim, Singapore, SG;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

Semiconductor packages and methods for making and using the same are described. The semiconductor packages contain a lead frame that has been folded to create folded leads that form a customized array of land pads and vias. The lead frame contains both longer folded lead and shorter folded leads. The longer leads can be folded so that an upper part of the longer leads form vias, the lower part forms part of a land pad array, and a substantially flat part that is connected to a first die containing an IC. The shorter leads can be folded so that a lower part forms part of a land pad array and the short leads are connected to a second die containing in IC. The folded leads can be routed according to the requirements of each specific IC die to which they are connected and therefore can support multiple dies in the semiconductor package. Other embodiments are also described.


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